An integrated circuit (“IC”) is a device (e.g., semiconductor device) that includes many electronic components, such as transistors, resistors, diodes, etc. These electronic components can be connected together to form multiple circuit components such as gates, cells, memory units, arithmetic units, controllers, decoders, etc. An IC includes multiple layers of wiring that interconnect its electronic and circuit components.
Design engineers design ICs by transforming logical or circuit descriptions of the ICs components into geometric descriptions, called layouts. IC layouts typically include (1) circuit modules (i.e., geometric representations of electronic or circuit IC components) with pins, and (2) interconnect lines (i.e., geometric representations of wiring) that connect the pins of the circuit modules. A collection of pins that need to be connected is typically called a net.
To create layouts, design engineers often use electronic design automation (“EDA”) applications. These applications provide sets of computer-based tools for creating, editing, and analyzing IC design layouts. Examples of such tools include (1) standard cell libraries that provide numerous cells that can be instantiated as circuit modules in a design, (2) placement tools that define the location of the various circuit modules in a layout, (3) routing tools that define the wiring between the circuit modules, and (4) verification tools that verify that the designed layout will meet design operation requirements.
Thermal analysis tools are one type of verification tools that are used currently. Prior thermal analysis tools dealt mostly with the thermal properties of the chip packages and often ignored thermal properties on the chip. These prior tools were mainly concerned about the total power dissipation of the chip, and about whether a specific package was sufficient to cool a given chip. In these tools, the chip often was treated as a lumped heat source, while the model for the package was very detailed, including details regarding airflow around the package.
In recent years, on-chip thermal analysis has become more important as the number of active devices and the total amount of on-chip power has increased due to larger chip sizes and/or smaller device sizes. This analysis has also become more important with the increase of the power density on the chips due to scaling. The increase in low power chips for mobile devices has also increased the demand for on-chip analysis. In low power chips, leakage current is a big contributor to power consumption. Often the techniques that are used in low power consuming chips (e.g., turning off areas of the IC) create voltage gradients, which cause leakage current and inaccurate power dissipation analysis.
As illustrated in FIG. 1, leakage current is greatly affected by on-chip temperature variations. In fact, a circular dependency exists between the on-chip temperature, leakage current, and power dissipation. As illustrated in FIG. 2, the leakage current 210 affects the power dissipation 215. As the leakage current 210 rises, the power dissipation 215 also rises along with it. The power dissipation 215 increases the temperature 205, which in turn increases the leakage current. This circular set of dependencies creates the potential for a runaway feedback loop in which the temperature of the IC continually increases with the leakage current.
FIG. 3 illustrates one current approach for performing on-chip thermal analysis for an IC design. Under this approach, a power analysis tool 305 and a thermal analysis tool 315 interact multiple times and repeatedly perform power and thermal analyses until their results begin to converge. Specifically, the power analysis tool 305 initially performs a first power analysis on a particular IC design that is defined by numerous parameters stored in a design database 310. To perform its initial analysis, the power analysis tool 305 assumes some ambient temperature for all circuit modules in the design. The power analysis tool 305 then passes to the thermal analysis tool 315 its initial results, which includes the power dissipated by each circuit module in the design.
The thermal analysis tool 315 then performs a first pass of its thermal analysis by converting the power dissipated by each circuit module into a heat source. This thermal analysis produces an intermediate temperature map 320 for the chip. This thermal map models the temperature distribution through the entire chip. In addition, an average temperature for each instance is available. The temperature for each circuit module is now passed back to power analysis tool 305. The power analysis tool 305 will now recompute the power dissipation of each circuit module based on the new temperatures; in particular, it will compute the leakage power of each circuit module. The new power numbers will now be passed on to the thermal analysis tool 315, which will now recompute a new temperature. After a certain number of iterations, the temperature and leakage will converge, and the iterations will stop at that point. The result of these iterative operations is a final thermal map 325 and a final power report 330.
The main disadvantage of the approach illustrated in FIG. 3 is that the iterations between power analysis and thermal analysis are slow and costly. In addition to the additional run time requirement, the system is also quite complex because of the loose iterations between different components in the system. Accordingly, there is a need for a process that more efficiently performs thermal analysis of an IC design. Moreover, there is a need for a process that performs thermal analysis of an IC design, where the wiring of the IC design layout is more efficiently taken into account. In addition, conventional thermal analysis processes do not take into account through-silicon vias of a substrate of an IC design. Accordingly, there is a need for a process that can perform thermal analysis on an IC design, where the substrate includes through-silicon vias.